CloudLC3 (Beta)

Program #1

Memory

Addr Label Hex Instruction
x3000 Start x0000 NOP
x3001 Ready x0000 NOP
x3002 Go x0000 NOP

Status

Registers

Graphical User Interface

Console

Files

Converter

Quick Reference

  • ADD* DR, SR1, [SR2|x5]

    ADD

    The ADD instruction takes the second and third arguments and adds them together. The result is stored in the first argument. Immediate must be between #-16 and #15. Sets the CC.

    Operation:

    DR = SR1 + (SR2 || SEXT(imm5))

    Examples:

    • ADD R0 R0 R1
    • ADD R2 R1 #5
    • ADD R5 R0 x3
    • ADD R7 R3 #-3
  • AND* DR, SR1, [SR2|x5]

    Bit-Wise AND

    The AND instruction takes the second and third arguments and ands them together. The result is stored in the first argument. Immediate must be between #-16 and #15. Sets the CC.

    Operation:

    DR = SR1 & (SR2 || SEXT(imm5))

    Examples:

    • AND R0 R0 R1
    • AND R2 R1 #5
    • AND R5 R0 x3
    • AND R7 R3 #-3
  • NOT* DR, SR

    Bit-Wise NOT

    NOT* DR, SR

    The NOT instruction takes the source register, nots the value, and stores the result in the destination register. Sets the CC.

    Operation:

    DR = !SR

    Examples:

    • NOT R0 R0
  • LEA* DR, PCoffset9

    Load Effective Address

    The LEA instruction takes the program counter and the PCoffset value and adds them together. The value is loaded into the destination register.

    Operation:

    DR = PC + SEXT(PCoffset9)

    Examples:

    • LEA R4 #0
    • LEA R1 x4
    • LEA R4 label
  • LD* DR, PCoffset9

    Load

    The LD instruction takes the program counter and the PCoffset value and adds them together. The value in the memory address at the result of the add is stored in the destination register. Sets the CC.

    Operation:

    DR = mem[PC + SEXT(PCoffset9)]

    Examples:

    • LD R0 #10
    • LD R3 x2
    • LD R7 #-5
    • LD R1 label
  • LDR* DR, BaseR, offset6

    Load Register

    The LDR instruction takes the base register and the offset value and adds them together. The value in the memory address at the result of the add is stored in the destination register. Sets the CC.

    Operation:

    DR = mem[BaseR + SEXT(offset6)]

    Examples:

    • LDR R0 R1 #0
    • LDR R1 R0 x4
    • LDR R4 R4 label
  • LDI* DR, PCoffset9

    Load Indirect

    The LDI instruction takes the base register and the offset value and adds them together. The value in the memory address at the result of the add is used as the pointer to a second memory address. The value at that second memory address is stored in the destination. Sets the CC.

    Operation:

    DR = mem[mem[BaseR + SEXT(offset6)]]

    Examples:

    • LDI R4 #0
    • LDI R1 x4
    • LDI R4 label
  • ST SR, PCoffset9

    Store

    The ST instruction takes the program counter and the PCoffset value and adds them together. The value in the memory address at the result of the add is set to the value in the source register.

    Operation:

    mem[PC + SEXT(PCoffset9)] = SR

    Examples:

    • ST R0 #10
    • ST R3 x2
    • ST R7 #-5
    • ST R1 label
  • STR SR, BaseR, offset6

    Store Register

    The STR instruction takes the base register and the offset value and adds them together. The value in the memory address at the result of the add is set to the value in the source register.

    Operation:

    mem[BaseR + SEXT(offset6)] = SR

    Examples:

    • STR R0 R1 #0
    • STR R1 R0 x4
    • STR R4 R4 label
  • STI SR, PCoffset9

    Store Indirect

    The STI instruction takes the base register and the offset value and adds them together. The value in the memory address at the result of the add is used as the pointer to a second memory address. The value at that second memory address is set to the value in the source register.

    Operation:

    mem[mem[BaseR + SEXT(offset6)]] = SR

    Examples:

    • STI R4 #0
    • STI R1 x4
    • STI R4 label
  • BR[n|z|p] PCoffset9

    Branch

    The BR instruction branch jumps to another location in memory if the condition codes are met. To get the new program counter, the pcoffset is added to the current program counter. Instructions with a * next to them set the condition codes. n = negative, z = zero, p = positive. If the CC is not met, nothing happens.

    Operation:

    PC = PC + SEXT(PCoffset9)

    Examples:

    • BRn label
    • BRnp label
    • BRzp #5
    • BRp label
    • BRnzp x5
  • JMP BaseR

    Jump

    The JMP instruction sets the program counter to the value of the base register. JMP R7 and RET are the same command.

    Operation:

    PC = BaseR

    Examples:

    • JMP R1
  • JSR PCoffset11

    Jump to Subroutine

    The JSR instruction sets register 7 to the value of the program counter. It then sets the program counter to the value of the program counter plus PCoffset11.

    Operation:

    R7 = PC

    PC = PC + SEXT(Poffset11)

    Examples:

    • JSR main
    • JSR x4
    • JSR #-10
  • JSRR BaseR

    Jump to Subroutine

    The JSRR instruction sets register 7 to the value of the program counter. It then sets the program counter to the value of the program counter plus the value in the base register.

    Operation:

    R7 = PC

    PC = PC + BaseR

    Examples:

    • JSRR R6
  • TRAP trapvector8

    System Call

    The TRAP instruction makes a system call. The program counter is stored in register 7. The starting location of the trap is stored at mem[vector8]. The program counter is set to the value in this address.

    Operation:

    R7 = PC

    PC = mem[ZEXT(vect8)]

    Examples:

    • TRAP x23
    • IN
    • OUT
    • PUTS
    • IN
    • PUTSP
    • HALT
  • RET

    Return

    The RET instruction takes the program counter and loads it into register 7. Used to return from a JSR.

    Operation:

    DR = PC + SEXT(PCoffset9)

    Examples:

    • RET